Arithmetic Instructions
x86 provides a compact but complete set of arithmetic instructions: ADD, SUB, INC, DEC, NEG, MUL, IMUL, DIV, and IDIV. Every one of them (except INC/DEC's treatment of CF, discussed below) computes a result and simultaneously updates the FLAGS register -- setting the Zero flag (ZF) if the result is 0, the Sign flag (SF) to the result's high bit, the Carry flag (CF) if an unsigned operation wrapped around, and the Overflow flag (OF) if a signed operation produced a mathematically invalid result. Later conditional jumps like JZ, JC, or JO branch based on exactly these flags.
Cricket analogy: Just as the scoreboard updates the run total after every boundary and also flags a milestone like a century, arithmetic instructions like ADD update both the result register and status flags such as ZF and CF simultaneously.
Addition, Subtraction, and Multi-Word Arithmetic
Real programs frequently need to add or subtract numbers wider than a single register, such as 64-bit values on a 32-bit CPU. ADC (add with carry) and SBB (subtract with borrow) solve this by incorporating the Carry flag left over from a previous ADD or SUB. The standard pattern is to ADD the lowest-order words first, which correctly establishes CF based on that word's own overflow, and then use ADC for each successively higher-order word, folding in the carry from the word below it.
Cricket analogy: Adding a batsman's runs from two different matches to get a season total, carrying over any partial figures, mirrors how ADC includes the Carry flag from a previous ADD to correctly sum 64-bit numbers using two 32-bit registers.
; Add two 64-bit numbers using 32-bit registers
section .data
num1_lo dd 0xFFFFFFFF
num1_hi dd 0x00000001
num2_lo dd 0x00000002
num2_hi dd 0x00000000
section .text
global _start
_start:
mov eax, [num1_lo]
add eax, [num2_lo] ; add low dwords, sets CF if overflow
mov ebx, [num1_hi]
adc ebx, [num2_hi] ; add high dwords plus carry from above
; 64-bit result now held in ebx:eax
mov eax, 1
int 0x80Multiplication and Division
Multiplication and division on x86 always involve the EDX:EAX register pair for their one-operand forms. MUL ebx multiplies the unsigned value in EAX by ebx, producing a full 64-bit product spread across EDX (high) and EAX (low); IMUL performs the signed equivalent. DIV ebx divides the 64-bit value in EDX:EAX by ebx, leaving the quotient in EAX and the remainder in EDX; IDIV does the same for signed operands. Dividing by zero raises a CPU exception rather than returning an error code, so a zero-divisor check before DIV is essential.
Cricket analogy: Multiplying a batsman's average by the number of innings played to project a season total, where the result can exceed a single scoreboard digit, mirrors how MUL ebx multiplies EAX by ebx and stores the full 64-bit product across EDX:EAX.
IMUL supports a convenient three-operand form, IMUL eax, ebx, 5, which computes eax = ebx * 5 in one instruction without disturbing EDX, unlike the one-operand MUL/IMUL forms that always target the EDX:EAX pair.
INC, DEC, NEG, and Flag Subtleties
INC and DEC increment or decrement a single operand by one and are notable for deliberately leaving CF unchanged, even though they update ZF, SF, OF, and PF -- this lets a loop counter use INC/DEC without disturbing an ongoing multi-word carry chain built from ADC/SBB elsewhere in the same routine. NEG computes the two's complement of its operand, effectively negating a signed value, and internally sets CF unless the operand was zero. Understanding exactly which flags each instruction touches is essential for writing correct conditional logic afterward.
Cricket analogy: A scorer who updates the individual batsman's tally without touching the team's overall extras count mirrors how INC ecx updates the Zero and Sign flags but deliberately leaves the Carry flag untouched, unlike ADD.
The Carry flag (CF) and Overflow flag (OF) measure different things: CF signals that an unsigned result wrapped around (e.g., 0xFFFFFFFF + 1), while OF signals that a signed result's sign bit is invalid for the operands given (e.g., adding two large positives yields a negative). Branching on the wrong one -- using JC when you mean JO, or vice versa -- silently produces incorrect results for the other operand interpretation.
- ADD, SUB, INC, DEC, NEG, MUL, IMUL, DIV, and IDIV are the core x86 arithmetic instructions.
- ADC and SBB incorporate the Carry flag from a previous instruction to support multi-word (wider than register) arithmetic.
- MUL and DIV treat operands as unsigned; IMUL and IDIV treat them as signed.
- MUL/IMUL (one-operand form) and DIV/IDIV always operate on the EDX:EAX register pair for the full-width result or dividend.
- INC and DEC update ZF, SF, OF, and PF but deliberately leave CF unchanged, unlike ADD and SUB.
- NEG computes the two's complement (arithmetic negation) of its operand.
- CF indicates unsigned overflow while OF indicates signed overflow -- they must not be confused.
Practice what you learned
1. What does the DIV instruction do when given a divisor of zero?
2. Which flag does ADC incorporate that plain ADD ignores?
3. Why does INC not affect the Carry flag?
4. For the one-operand form MUL ebx, where is the 64-bit result stored?
5. What is the key difference between CF and OF after a signed addition?
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